Home / Products / Integrated Circuits (ICs) / Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers / SI5382E-E-GMR
Part Number | SI5382E-E-GMR |
Datasheet | SI5382E-E-GMR datasheet |
Description | UNPROGRAMMED PROTOTYPING DEVICEL |
Manufacturer | Silicon Labs |
Series | - |
Part Status | Active |
Type | Clock Jitter Attenuator |
PLL | Yes |
Input | LVCMOS, Crystal |
Output | HCSL, LVCMOS, LVDS, LVPECL |
Number of Circuits | 2 |
Ratio - Input:Output | 4:12 |
Differential - Input:Output | Yes/Yes |
Frequency - Max | 735MHz, 2.94912GHz |
Divider/Multiplier | Yes/No |
Voltage - Supply | 1.71V ~ 3.47V |
Operating Temperature | -40°C ~ 85°C |
Mounting Type | Surface Mount |
Package / Case | 64-VFQFN Exposed Pad |
Supplier Device Package | 64-QFN-EP (9x9) |